Watchdog timer configuration register
| WDT_APPCPU_RESET_EN | WDT reset CPU enable. |
| WDT_PROCPU_RESET_EN | WDT reset CPU enable. |
| WDT_FLASHBOOT_MOD_EN | When set, Flash boot protection is enabled. |
| WDT_SYS_RESET_LENGTH | System reset signal length selection. 0: 100 ns, 1: 200 ns, 2: 300 ns, 3: 400 ns, 4: 500 ns, 5: 800 ns, 6: 1.6 us, 7: 3.2 us. |
| WDT_CPU_RESET_LENGTH | CPU reset signal length selection. 0: 100 ns, 1: 200 ns, 2: 300 ns, 3: 400 ns, 4: 500 ns, 5: 800 ns, 6: 1.6 us, 7: 3.2 us. |
| WDT_USE_XTAL | choose WDT clock:0-apb_clk, 1-xtal_clk. |
| WDT_CONF_UPDATE_EN | update the WDT configuration registers |
| WDT_STG3 | Stage 3 configuration. 0: off, 1: interrupt, 2: reset CPU, 3: reset system. |
| WDT_STG2 | Stage 2 configuration. 0: off, 1: interrupt, 2: reset CPU, 3: reset system. |
| WDT_STG1 | Stage 1 configuration. 0: off, 1: interrupt, 2: reset CPU, 3: reset system. |
| WDT_STG0 | Stage 0 configuration. 0: off, 1: interrupt, 2: reset CPU, 3: reset system. |
| WDT_EN | When set, MWDT is enabled. |